Delta-sigma (ΔΣ) analog to digital converters (ADCs) are increasingly used for high-fidelity conversion of analog signals into digital form. One of the drawbacks of a ΔΣ converter is that it can be placed in an improper operating condition by out-of-range signals or as a result of startup transients, and thus requires a mechanism to return it to proper operation upon overload and at startup. A typical implementation of this mechanism is to reset the internal states of the system, i.e. to discharge all state-storing capacitors in the loop filter. For many modulators, this state reset is sufficient.
Feedforward modulators, however are less tolerant of a simple reset. FIG. 1 plots the output of the first integrator in a third-order feedforward modulator which starts from an initial state of zero when a moderately large dc input is present. As indicated, the first integrator's output exhibits larger excursions at startup than when the modulator has achieved steady-state. Requiring the integrator to accommodate the much larger transient response would worsen the ADC's power consumption or degrade its dynamic range, while an inability to accommodate the transient response may cause the modulator to behave improperly and lead to repeated reset events.
These transients which can occur with abrupt startups or resets can cause unusually large signal swings that exceed normal operating conditions. In computer simulations the input signals are tailored to avoid these events but in a practical implementation they remain a problem. Automatic Gain Control (AGC's) circuits can regulate input in response to output excursions beyond predetermined limits, but only after the fact: AGC's cannot, for example, anticipate and react to startup/reset transients.